| Attribute | Value |
|---|---|
| Density | 1 Gbit |
| Organization | 128M x 8 |
| Interface | Single, dual and quad SPI; QPI |
| Supply Voltage | 2.7 to 3.6 V |
| Operating Temperature | -40 to +105 C (automotive grade 2) |
| Read Clock | Up to 133 MHz SDR (x1/x2/x4) |
| Program | 256-byte pages; 4 KB sectors; 32/64 KB blocks |
| Packing | Tape and reel |
| Package Details | 8-pin WSON, 8 x 6 mm body |
GD55B01GFY2GR is a GigaDevice serial nor flash.
The device is specified at Single, dual and quad SPI; QPI.
Its series is described as follows: GigaDevice positions its SPI NOR flash as high-reliability code storage for embedded systems, with wide voltage options and small package sizes.
It is used where this memory has to be qualified once and remain in production, and the data sheet defines the timing the design closes against.
Its highlight is the automotive qualification, which is what lets the part into ADAS modules rather than bench equipment.
Within the family, this ordering code is the one specified for 1 Gbit density.
On the bench, the parameters that decide the design are Density 1 Gbit and Memory Organization 128M x 8.
The variant is defined by Interface Single, dual and quad SPI; QPI and Supply Voltage 2.7 to 3.6 V.
The closest other ordering code is GD25F64FS2GR, which differs in density (64 Mbit against 1 Gbit).
In this ordering code the read clock is Up to 133 MHz SDR (x1/x2/x4).
It is used in FPGA configuration and boot code storage, where the function has to behave predictably over the life of the equipment.
Pre-shipment checks cover batch, package, labels and markings. Inspection photos and third-party inspection support are available on request.
Worldwide delivery is supported. Carrier, lead time and buyer-appointed forwarder requirements are confirmed with the quotation.
Payment method, currency and trade terms are subject to the formal quotation or proforma invoice.
