What changed #
On September 16, 2026, Lattice Semiconductor (NASDAQ: LSCC) introduced the Mach-N2 family, a new line of secure-control FPGAs built on the company's Nexus 2 small-FPGA platform, together with Lattice Prompt, a free AI-assisted FPGA design tool. Mach-N2 spans five devices from 65K to 220K system logic cells and integrates 128 Mb to 256 Mb of on-chip configuration flash. The MH21D Root-of-Trust device adds what Lattice presents as the only full CNSA 2.0-compliant post-quantum cryptography (PQC) suite among small FPGAs. A 220K-logic-cell device fully configures from on-chip flash in under 30 ms. The family connects to host processors over PCIe 4.0, 10G Ethernet and 16 Gbps SerDes. Lattice states devices are available for order now and that samples have already shipped to compute and communications customers.
Why buyers should care #
The practical reason this release matters to procurement is timing. The U.S. National Security Agency's CNSA 2.0 suite is now in effect, and new national-security-system acquisitions face a January 1, 2027 gate for quantum-resistant signing (per analyst reading of the NSA timeline). Lattice's claim — the complete CNSA 2.0 algorithm set in hardware, exposed to the user at runtime — turns a future compliance date into a present sourcing question for any program that must stay qualified through the next hardware build cycle.
For buyers, that means three things: (1) the MH21D adds an announced hardware option for the full PQC suite, with devices available to order and samples already shipped; (2) qualification and second-source planning should account for which vendors actually meet the mandated algorithm set versus those that are merely "aligned"; and (3) because Mach-N2 is new, lead-time and allocation terms are not yet settled in the distribution channel and should be confirmed per density before commitment.
The launch also arrives with business momentum behind it. Lattice reported Q2 fiscal-2026 revenue of $201.1 million, up 62.2% year over year, with its compute-and-communications line up 83% — so the secure-control franchise now has both a product and a commercial case. The companion Lattice Prompt tool links agentic IDEs (Claude Code, Cursor, VS Code) to the Lattice Radiant flow over open Model Context Protocol, which can shorten the evaluation timeline and help teams qualify before the 2027 gate rather than after it.
Product scope and availability #
Mach-N2 is positioned for system control and security in compute, communications and industrial infrastructure — the always-on management and boot functions that sit beside a main application processor or ASIC. It is not a high-density data-center FPGA; the 65K–220K system-logic-cell range places it in the control and secure-management tier, alongside devices such as Lattice's own MachXO line and comparable small FPGAs from other vendors.
Lattice reports the devices are orderable today with samples already in customer hands, but it has not published standard lead times. Buyers evaluating Mach-N2 should treat the current window as an evaluation-and-qualification phase: confirm the specific density, package and temperature grade required, then request a quoted lead time and allocation position from authorized distribution rather than assuming catalogue stock.
How the security claim compares #
The competitive field sorts by how completely each vendor meets CNSA 2.0, and the wording matters against a procurement deadline. Based on Lattice's announced specifications and a comparative reading of competitor documentation:
| Vendor / family | Post-quantum positioning | Notable interface |
|---|---|---|
| Lattice Mach-N2 MH21D (Nexus 2) | CNSA 2.0-compliant PQC (ML-DSA, LMS and XMSS authentication; ML-KEM key exchange); separate classical cryptography includes AES-256-GCM, ECC-521 and RSA-4096 | PCIe 4.0, 10G Ethernet, 16 Gbps SerDes, on-chip flash |
| AMD Kintex UltraScale+ Gen 2 | Described as "aligned with" CNSA 2.0; published PQC boot support limited to LMS | High-speed serial, broad ecosystem |
| Altera Agilex 5 | Adds PQC secure boot; no full CNSA 2.0 branding | PCIe, high-speed serial |
| Microchip, Efinix, Achronix | Varied secure-boot / crypto features; no full CNSA 2.0 claim cited | Mixed |
The detail that matters for sourcing is the distinction between "compliant" and "aligned." A buyer whose program must clear the 2027 gate should verify, against the exact required algorithms, whether a candidate device exposes them at runtime or only supports a subset in boot. Lattice's full-suite claim is verifiable against competitor documentation and is the differentiator the launch is built around.
RFQ and sourcing checks #
| Risk signal | Buyer action |
|---|---|
| New-family lead time | Request quoted lead time and allocation for the exact Mach-N2 density and package |
| Secure-qualification deadline | Confirm which CNSA 2.0 algorithms the design must expose, then match to device capability |
| Evaluation vs production | Separate sample quantities from production volume; confirm production ramp timing |
| Channel availability | Verify authorized-distribution stock before assuming catalogue availability |
| Package and date code | Confirm package, date code and lot traceability on any purchased units |
Practical takeaway #
Lattice Mach-N2 is a newly announced secure-control FPGA family, available to order with samples already shipped. Its MH21D Root-of-Trust device supports the full CNSA 2.0 post-quantum suite in hardware and instant-on flash boot — a concrete option for programs facing the 2027 quantum-resistant signing gate. For buyers, the immediate work is qualification, not bulk purchase: confirm the required algorithm set, density and package, then lock a quoted lead time through authorized channels, because standard lead times for a brand-new family are not yet established in distribution. Where a full PQC suite is not yet a requirement, existing small FPGAs such as Altera MAX 10 or Cyclone devices remain valid control-FPGA choices; the Mach-N2 decision is really a security-qualification question, not a drop-in replacement question.
Sources:
- Lattice Mach-N2 launch announcement, September 16, 2026 — announced features and order/sample availability.
- Lattice Mach-N2 product page and device selection guide — device range and MH21D PQC support.
- Lattice Nexus 2 Platform — Overview, FPGA-DS-02122-0.80, September 2026, Section 2.15 — security engine and additional PQC capabilities on Root-of-Trust devices.
- Lattice Semiconductor Mach-N2 announcement and Lattice Prompt, September 16, 2026 — coverage: Futurum Group (September 21, 2026), 科创板日报 / NetEase (September 17, 2026), Vision Systems China (September 17, 2026).
- NSA CNSA 2.0 suite and the January 1, 2027 national-security acquisition timing — as characterized in the Futurum analysis; verify against the current NSA/DoD publication for any program-specific requirement.
- Competitive security positioning (AMD Kintex UltraScale+ Gen 2, Altera Agilex 5) — comparative reading of vendor documentation as summarized in the Futurum analysis.