| Storage Capacity | 8 Gbit (1 GiB nominal raw array); two 4 Gbit NAND dies |
| Organization | 8 Gbit x1 device configuration; dual-die with separate die select; SPI supports x1, x2 and x4 data transfer |
| Interface | SPI; at 1.8 V up to 83 MHz in supported modes; standard x1, x2 and x4 transfers; BBh/EBh cache read limited to 50 MHz |
| Endurance | 100,000 program/erase cycles per manufacturer headline |
| Data Retention | Uncycled data retention: 10 years at 85°C, 24/7; additional JEDEC JESD47H-compliant retention qualification |
| Supply Voltage | VCC 1.7 to 1.95 V, 1.8 V nominal |
| Operating Temperature | -40 to +105°C ambient; AAT automotive grade, AEC-Q100 compliant |
| Memory Technology | Raw SLC NAND; M70A automotive series |
| Page and Block Geometry | Per page 4096 bytes main plus 256 bytes spare; 64 pages per block; 2048 blocks per die, 4096 total before bad-block allowance |
| On-die ECC | 8-bit correction per 512 user bytes + 8 spare bytes + 16 ECC bytes; ECC enabled by default at power-up and configurable |
| Continuous Read Timing | At 1.8 V: maximum 83 MHz x1, 60 MHz x2, 30 MHz x4 in continuous read mode |
| Read and Program Latency | At 1.8 V, page read 25 µs maximum with ECC disabled and continuous read off; 90 µs typical / 178 µs maximum with ECC enabled and continuous read on; page program 200 µs typical / 600 µs maximum ECC off or 240 µs typical / 600 µs maximum ECC on |
| Block Erase Time | 2 ms typical |
| Operating Current | Page read 25 mA typical / 35 mA maximum; program 20/25 mA; erase 15/20 mA, 1.8 V electrical table; typical at 25°C ambient |
| Standby Current | 15 µA typical / 50 µA maximum, AAT grade; CS# = VCC and inputs at VSS or VCC, 1.8 V supply; typical at 25°C |
| SPI Timing | Clock high and low at least 5.4 ns; CS# deselect at least 50 ns; input setup at least 4 ns and hold at least 2 ns, 1.8 V table |
| Protection and OTP | Software and hardware block locking; permanent block locking; 10 one-time-programmable pages per die |
| Lifecycle | Micron product catalogue lists Production; checked 2026-11-03 |
| Package Details | 24-ball T-PBGA (5 x 5 array); package code 12; 6.0 x 8.0 mm body, 1.0 mm ball pitch, 1.1 +/- 0.1 mm package height |
