| Optical Format | 1/2.9 inch |
| Active Pixel Array | 1920 x 1080 |
| Pixel Size | 2.8 x 2.8 µm |
| Shutter Type | Electronic rolling shutter |
| ADC Resolution | 10 bit |
| Output Interface | 2-lane MIPI; DVP |
| Output Format | RAW Bayer 10-bit / 8-bit |
| Maximum Frame Rate | 30 fps at full resolution |
| Supply Voltage | AVDD 2.7-2.9 V (2.8 V typical); DVDD 1.15-1.3 V (1.2 V typical); IOVDD 1.7-2.8 V (1.8 V typical) |
| Input Clock Frequency | 6-27 MHz |
| Operating Temperature | -20 to +80 °C (datasheet V1.1) |
| Typical Power Consumption | 98 mW (datasheet typical value) |
| Standby Current | Analog 8/9 µA; digital 290/400 µA; I/O 77/130 µA (typ/max; AVDD 2.8 V, DVDD 1.2 V, IOVDD 1.8 V; Tj 25 °C; RESET low, POWERDOWN low) |
| Power-off Current | Analog, digital and I/O each listed as 0 µA at Tj 25 °C in power-off state |
| Operating Current (MIPI) | Analog 17.3/18 mA; digital 37.4/39 mA; I/O 2.39/2.5 mA (typ/max; 2-lane MIPI, full size, 27 MHz, 30 fps, RAW10; AVDD/DVDD/IOVDD 2.8/1.2/1.8 V; Tj 25 °C) |
| Input Clock Jitter | 600 ps maximum, period peak-to-peak |
| Input Clock Rise | 1-15 ns each |
| Input Clock Duty Cycle | 40-60% |
| Control Interface | Two-wire serial bus, slave receiver/transmitter |
| Serial Bus Clock Frequency | 400 kHz maximum |
| Serial Bus Free Time | 1.3 µs minimum between stop and start |
| Serial Bus Clock Low | LOW 1.3 µs minimum; HIGH 0.6 µs minimum |
| Serial Bus Start Timing | Repeated-start hold and setup: 0.6 µs minimum each |
| Serial Bus Data Timing | Hold 0-0.9 µs; setup 100 ns minimum |
| Serial Bus Rise | 300 ns maximum each for SBCL and SBDA |
| Serial Bus Stop Setup Time | 0.6 µs minimum |
| DVP Frame Length | Valid image rows + 20 + vertical blanking rows; vertical blanking is register-cconfigurable |
| Package Details | 47-ball CSP; nominal body 6.135 x 4.102 mm, total height 0.760 mm; body x 6.110-6.160 mm, y 4.077-4.127 mm, height 0.705-0.815 mm; x/y ball pitch 0.690/0.650 mm; nominal ball diameter 0.300 mm |
