| Family / Architecture | Arria 10 270, TSMC 20 nm, 20 nm ALM logic fabric |
| Logic Elements | 270,000 logic elements (101,620 ALMs) |
| Embedded Memory (M20K) | 15,000 Kb (M20K) plus 2,452 Kb MLAB |
| Variable-Precision DSP | 830 DSP blocks (1,660 × 18×19 multipliers), hard IEEE 754 single/double-precision floating-point |
| Hard Memory Controller | 8 controllers, DDR4 up to 2,400 Mbps (DDR3/DDR3L supported) |
| Transceivers | 24 × 17.4 Gbps transceivers |
| PCI Express | 2 hard PCIe Gen3 IP blocks ( × 1/ × 2/ × 4/ × 8) |
| PLLs | 8 fractional-synthesis fPLLs + 8 I/O PLLs |
| Core Voltage | 0.9 V standard VCC (Standard power option) |
| Speed Grade | Transceiver speed grade 4; FPGA fabric speed grade 3 (1 fastest) |
| Temperature Grade | Industrial (TJ = -40 °C to 100 °C) |
| Registers | 406,480 registers |
| Package / Orderable Variant | 1,152-ball FineLine BGA (F34), 35 × 35 mm, 1.00 mm pitch; exact suffix 10AX027H4F34I3SG |
| Package Details | 1,152-ball FineLine BGA (F34), 35 × 35 mm, 1.00 mm pitch |
Altera