| Family / Architecture | Arria 10 160, TSMC 20 nm, 20 nm ALM logic fabric |
| Logic Elements | 160,000 logic elements (61,510 ALMs) |
| Embedded Memory (M20K) | 8,800 Kb (M20K) plus 1,050 Kb MLAB |
| Variable-Precision DSP | 156 DSP blocks (312 × 18×19 multipliers), hard IEEE 754 single/double-precision floating-point |
| Hard Memory Controller | 6 controllers, DDR4 up to 2,400 Mbps (DDR3/DDR3L supported) |
| Transceivers | 6 × 17.4 Gbps transceivers |
| PCI Express | 1 hard PCIe Gen3 IP block ( × 1/ × 2/ × 4/ × 8) |
| PLLs | 6 fractional-synthesis fPLLs + 6 I/O PLLs |
| Core Voltage | 0.9 V standard VCC (Standard power option) |
| Speed Grade | Transceiver speed grade 4; FPGA fabric speed grade 3 (1 fastest) |
| Temperature Grade | Industrial (TJ = -40 °C to 100 °C) |
| Registers | 246,040 registers |
| Package / Orderable Variant | 484-ball Ultra FineLine BGA (U19), 19 × 19 mm, 0.80 mm pitch; exact suffix 10AX016C4U19I3SG |
| Package Details | 484-ball Ultra FineLine BGA (U19), 19 × 19 mm, 0.80 mm pitch |
Altera