| Core / Architecture | Programmable FastDSP engine (to 768 kHz) plus 28-bit SigmaDSP core (to 50 MIPS); 28-bit multiplier, 56-bit adder |
| Clock / Processing | FastDSP to 768 kHz; SigmaDSP to 50 MIPS; PLL input 30 kHz–27 MHz |
| On-Chip Memory | 2048×39-bit program RAM; 2048×28-bit parameter RAM; 2048-word data RAM |
| ADC / DAC Resolution | 24-bit ADC; 24-bit DAC |
| Channels | 4 single-ended analog inputs; 8 digital microphone inputs; 2 differential analog outputs; 2×16-channel serial ports; 4-channel ASRC |
| Audio Performance | PGA+ADC SNR 96 dB; DAC+headphone SNR 105 dB; line ADC 98 dB A-weighted, THD+N −90 dBFS |
| Sample Rate | Serial port fSYNC 8 kHz–768 kHz |
| Interfaces | I²S/left-justified/TDM16 audio, PDM microphone inputs; I²C and SPI control |
| Supply Voltage | AVDD 1.7–1.98 V; DVDD 0.85–0.99 V; IOVDD 1.1–1.98 V |
| Operating Temperature | −40 °C to +85 °C |
| Package Details | 42-ball WLCSP (CB-42-2), 2.695 × 2.320 mm, 0.35 mm pitch |
Analog Devices
